Intellectual Property Modules
Our technology is primarily designed for
very high volume appliance markets where customers will wish to
embed networking capability into their Systems-on-Chip (SoC) solutions.
By designing for IP migration from the start, we are able to reduce
risk, cost and time in implementing high volume embedded applications.
Our IP Modules consist of:
Digital
nSine’s digital architecture, including
the nCode™ protocol engine, the Network Connectivity Protocol
(NCP) and the Data Transfer Protocol (DTP), will be made available
in the following format:
-
Synthesisable
RTL with RTL test benches, timing and
synthesis constraints
together with a top level
design description.
-
Abstracts plus
GDSII Tape Out and test support data for
a number of high volume fabs.
RTL has been created with Active HDL (Aldec)
and targeted to 0.18 micron standard CMOS using Synplify ASIC tools, to ensure compatibility with industry standards.
Analog
nSine's analog architecture, including WAM™
will be made available as an IP Block targetted to the customers library in the following format:
The nSine Powerline modem reference design is fabricated on
0.18 micron standard mixed signal, single-poly, five-metal
CMOS and is 2 square mm excluding pads.
nSine are members of the Virtual Socket Interface Alliance (VSIA)
and subscribe to the vision that open standards and virtual components
from multiple sources are the future of SoC. IP provided by nSine
will be VSIA compliant
|
